In the quest for the perfectly surfaced wafer - the micro-thin slice of bare silicon onto which Intel, Motorola, and others print repeating rows of chip circuitry - plasma-assisted chemical etching (PACE) may soon take on an important role.
Wafer manufacturer MEMC Electronic Materials and Integrated Process Equipment Corp., a producer of wafer-manufacturing tools, are determined to find PACE's place in chip development. The two companies have announced a pilot research and development plan in which MEMC will purchase US$5.4 million worth of IPEC's plasma-based planarization tools to see if the plasma-assisted technology - already used elsewhere in the chip-production process - can't improve the efficiency and yields of the chipmaking process.
Should the project bear fruit, MEMC would be likely to purchase and deploy IPEC's equipment to adapt its wafer-production process accordingly.
Plasma-assisted chemical etching is a noncontact, nonabrasive method of removing contaminants from fine surfaces such as silicon by exciting a precisely located chemical reaction, whose position and activity are computer-controlled.
Chipmakers already use plasma-assisted layering to apply the photosensitive material that creates circuits to a bare silicon wafer. But for this application to be successful, the wafer's surface must be as flat and contaminant-free as possible - lest a chip's circuitry be slowed or even fatally flawed.
Thus far, PACE technology has not been applied in the refinement of the bare wafer. Current wafer polishing, one of the steps MEMC hopes PACE will enhance, is achieved with procedures such as chemical slurrying. Slurries help flush away wafer imperfections, but also leave their own residue behind, which must then be removed.
IPEC Precision, the division that manufactures plasma-assisted etching equipment, generally expects the results to significantly advance its wafer-planarization technology.
"In between etching and cleaning, our goal is to replace some of the steps in the process ... potentially one of the finer and finer slurries," said Jack Callahan, IPEC Precision's vice president of sales and marketing.
If the project succeeds, wafer manufacturers like MEMC could be looking at the ability to produce a flatter-surfaced premium wafer, with a fringe benefit of less chemical waste.
"They'd get a net lower-cost process," Callahan said, "higher quality, and better performance."
Certain types of chipmaking, most notably DRAM, require that the silicon wafers be of high quality. Dataquest analyst Clark Fuhs sees potential for PACE to make the premium-wafer market more attractive to manufacturers.
There is also a matter of yield, the main goal of chipmakers. Getting more chips out of a single wafer could be another benefit of the PACE process - particularly the next-generation, larger-diameter 300mm wafers.
"The company that sits still loses in the end," said Fuhs. Therefore whether or not this joint R&D endeavor advances wafer production, manufacturers have an imperative to explore such possibilities to stay ahead.
